Modern computer processors often have associated cache memory. In many common configurations, when not already present in a cache, data from memory is copied to and stored in the cache when a processor seeks to perform an operation (e.g., read, write, etc.) using the data. Once the data has been stored in a cache, the data may be used by using (e.g., accessing, manipulating, modifying, etc.) the copy of the data in the cache, rather than memory, until, for example, the data is evicted from the cache and, if modified, written back to memory. A processor with an attached cache may include functionality to determine if data needed to perform an operation is present in the cache. When data is present in the cache (i.e., a cache hit), the data will be used by the processor to perform the operation. When data is not present in the cache (i.e., a cache miss), the data may be subjected to several operations in order to, at least, copy the data from memory into the cache before a processor may use the data. Data being present in the cache may improve the performance of the processor performing the operation because, for example, cache memory may operate at higher speeds and/or be located physically nearer to the processor than various other types of memory (e.g., main system memory such as random access memory (RAM)) available in a computing device. Therefore, data stored in a cache associated with a given computer processor may be available for use by the processor more quickly than data that must be retrieved from other memory locations, hard drives, and/or caches associated with other processors of a computing device.
Additionally, some devices, or portions thereof, included in and/or operatively connected to a computing device may include functionality to perform operations that read data directly from and/or write data directly to memory (e.g., via direct memory access (DMA) operations). Such operations have the potential to cause cache coherency issues, as copies of data in memory that have been subject, for example, to a DMA operation may no longer align with copies of the data from the memory location in one or more caches of a system. In order to perform an operation using data that has been written to memory by such a device, and to avoid potential cache coherency issues, a processor may need to access the memory location where the data is stored and copy the data to a cache before an operation may be performed using the data.